18-224/624: Intro to Open-Source FPGA and ASIC Chip Design
| Category | Difficulty |
|---|---|
| HW | 3 |
| Projects | Varies |
This class explores a number of open-source tools used for digital integrated circuit (IC) design. Lectures discuss both the theory and applications of digital design and FPGAs, and illustrate how to use these open-source tools to aid in the design of digital ICs. Lectures are mandatory, and plenty of helpful demos are provided for students to see the tools in action.
The course consists of a few small homework assignments and a final project in which students design, test, and tapeout their own digital IC. Note that in Spring 2023, this course was crosslisted as a StuCo (98-154). In Fall 2023, it will only be offered as a StuCo, but 18-224/624 should be offered once more in Spring 2024 as a full 12-unit course.
Prerequisites
It is recommended to have taken 18-240 before this course, or at least to be taking the course concurrently. Though the homeworks will help students review digital logic and programming in hardware description languages (HDLs), namely SystemVerilog, having some existing familiarity will certainly help students have an easier time during the final project.
Homeworks
The homeworks are designed to help students practice and review various skills in digital design and HDLs. In general, they are not difficult relative to similar classes in digital design, and the teaching staff is happy to help students in office hours or online.
Homework 1
The first homework is intended to review the fundamentals of digital design and HDLs, as well as helping students set up their programming environment and workflow. Students synthesize and test a simple digital design on an FPGA board, as well as using an HDL to simulate and test a basic calculator design. By the end of the assignment, students become familiar with Yosys and the basics of testbenching.
Homework 2
The second homework has students learn more about digital design and synthesis on FPGAs, as well as methods of testing and verification of designs. The first part of the homework has students design and synthesize an 8-bit counter on an FPGA, which displays the state of the counter using a seven-segment display. The second part of the homework has students working with testbenches such as Verilator or CocoTB in order to simulate and verify the design of a matrix multiplier written using an HDL. There are also a few written questions about relevant concepts discussed in lecture.
Homework 3
The third homework, which was extra credit in Spring 2023, has students explore the design and layout of transistors. Using SiliWiz, students work through a guided tutorial that explains how MOSFETs are designed, layer by layer. After building a basic CMOS inverter, students then experiment with various parameters such as gate width and overlap areas to see how this affects the functionality of the design. This provides a deeper understanding of ICs at the semiconductor level.
Project
The final project, which is the main deliverable of the course, has students design and tapeout their own digital IC using the Skywater 130nm PDK. Students use an HDL of their choice and testbenches such as Verilator or CocoTB to verify their design. Students have plenty of freedom in terms of what their design will be. The only constraints are that:
- It must be a synthesizable digital design (no latches, no oscillators, no analog components, etc.)
- It must work with a 1 MHz clock or less
- There is a 250um x 250um space available on the chip
- There are 12 I/O pins
Additionally, the project has several checkpoints throughout the semester, including:
- Initial idea submission in February
- RTL checkpoint in March
- Testbench checkpoint in April
- Final submission in May
There is plenty of help offered by the teaching staff, so don't be afraid to choose something ambitious for your project! Students who successfully tapeout at the end of the semester can expect to see their designs come back in the following semester, where they will have the opportunity to test their IC and verify its functionality. Overall, the project is a great way to learn about the IC design process and can help prepare students for more advanced IC design courses such as 18-725.